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features ? ? ? 2.5?a?maximum?peak?output? current ? ? ? 2.0?a?minimum?peak?output? current ? ? ? 25? kv/s? minimum? common ? mode ? rejection ? (cmr) ? at ? v cm ?=?1500? v ? ? ? 0.5? v? maximum? low ? level ? output? voltage ? (v ol )? eliminates ?need? for? negative? gate? drive ? ? ? i cc ?=?5?ma?maximum?supply? current ? ? ? under? voltage ? lock-out ? protection ? (uvlo) ? with? hysteresis ? ? ? wide ? operating? v cc ? range:?15? to?30? volts ? ? ? 500?ns?maximum? switching?speeds ? ? ? industrial ? temperature? range:?-40c? to?100c ? ? ? safetyapproval: ? ul recognized ? 3750? vrms ? for?1?min.? for?hcpl -3120/j312? ? 5000? vrms ? for?1?min.? for?HCNW3120? ? csa approval ? ? iec/en/din en 60747-5-2 approved ? v iorm ? =?630? v peak ? for?hcpl -3120? (option?060)? ? v iorm ? =?891? v peak ? for?hcpl - j312? ? v iorm ? =?1414? v peak ? for?HCNW3120 applications ? ? igbt/mosfet ? gate? drive ? ? ac/brushless ?dc? motor? drives ? ? industrial ? inverters ? ? switch ?mode? power?supplies hcpl-3120/j312, HCNW3120 2.5 amp output current igbt gate drive optocoupler data sheet lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. description the ? hcpl-3120 ? contains ? a? gaasp ? led? while? the ????????? hcpl - j312? and? the? HCNW3120? contain ? an? algaas ? led. ? the ? led? is? optically? coupled ? to ? an? integrated ? circuit ? with? a? power ? output? stage. ? these ? optocouplers ? are ? ideally? suited ? for ? driving ? power ? igbts ? and? mosfets ? used? in? motor ? control ? inverter ? applications. ? the ? high? operating ? voltage ? range ? of? the? output? stage? provides ? the? drive ? voltages ? required ? by ? gate ? controlled ? devices. ? the ? voltage ? and? current ? supplied? by ? these? optocouplers ? make? them? ideally? suited ? for ? directly ? driving ? igbts ? with? ratings ? up? to ? 1200? v/100? a.? for ? igbts ? with? higher? ratings, ? the? hcpl-3120 ? series ? can? be? used? to ? drive ? a? discrete ? power ? stage? which? drives ? the? igbt ? gate. ? the ? HCNW3120? has? the? highest? in - sulation ? voltage ? of? v iorm? =? 1414? vpeak ? in? the? iec/en/din? en? 60747-5-2.? the ? hcpl-j312 ? has? an? insulation ? voltage ? of? v iorm? =? 891? v peak ? and? the? v iorm? =? 630? v peak ? is? also? available ?with?the? hcpl-3120? (option? 060). a?0.1?f? bypass? capacitor?must?be? connected? between?pins?5?and?8. truth table led v cc - v ee positive going (i.e., turn-on) v cc - v ee negative going (i.e., turn-off) v o off? 0?-?30? v? 0?-?30? v? low ? on? 0?-?11? v? 0?-?9.5? v? low ? on? 11?-?13.5? v? 9.5?-?12? v? transition ? on? 13.5?-?30? v? 12?-?30? v? high? functional diagram 1 3 shield 2 4 8 6 7 5 n/ c ca thode anode n/c v cc v o v o v ee 1 3 shield 2 4 8 6 7 5 n/c ca thode anode n/c v cc n/c v o v ee HCNW3120 hcpl-3120/j312
2 selection guide ? part number hcpl-3120 hcpl-j312 HCNW3120 hcpl-3150* ? output ? peak? current?(?i o )? 2.5?a? 2.5?a? 2.5?a? 0.6?a ? iec/en/din?en??? v iorm? =? 630? v peak ? v iorm? =? 891? v peak ? v iorm? =? 1414? v peak ? v iorm? =? 630? v peak ? ? 60747-5-2? approval? (option ?060) ? ? ? (option ?060) *the ? hcpl-3150? data?sheet? available.? contact? avago?sales? representative?or? authorized? distributor. ordering information hcpl-3120 ? and? hcpl-j312 ? are ? ul? recognized ? with? 3750? vrms ? for ? 1? minute ? per? ul1577.? HCNW3120? is? ul? recognized ? with?5000? vrms ? for?1? minute?per?ul1577. option part rohs non rohs surface gull tape iec/en/din number compliant compliant package mount wing & reel en 60747-5-2 quantity ? ? -000e? no?option ? ? ? ? ? ? 50?per?tube? ? -300e? #300 ?? ? x? x ? ? ? 50?per?tube? hcpl-3120 ? -500e? #500 ? ? x? x? x ? ? 1000?per? reel ? -060e? #060 ? ? ? ? ? x? 50?per?tube? ? -360e? #360 ? ? x? x ? ? x? 50?per?tube? ? -560e? #560 ? ? x? x? x? x? 1000?per?tube ? -000e? no?option ? ? ? ? ? x? 50?per?tube? hcpl-j312 ? -300e? #300 ?? ? x? x ? ? x? 50?per?tube? ? -500e? #500 ? ? x? x? x? x? 1000?per? reel ? -000e? no?option ? ? ? ? ? x? 42?per?tube? HCNW3120? -300e? #300 ?? ? x? x ? ? x? 42?per?tube? ? -500e? #500 ? ? x? x? x? x? 750?per? reel to ? order, ? choose? a? part ? number? from ? the? part ? number? column ? and? combine ? with? the? desired ? option? from ? the? option? column ? to? form?an? order? entry.? example?1:? ? hcpl-3120-560e ? to ? order ? product ? of? 300? mil? dip? gull? wing ? surface ? mount ? package ? in? tape ? and? reel ? packaging ? with? iec/en/din?en?60747-5-2? safety? approval?in? rohs? compliant. example?2:? ? ? hcpl-3120 ? to? order? product?of?300?mil?dip? package?in?tube? packaging?and?non? rohs? compliant. option? datasheets? are? available.? contact? your? avago?sales? representative?or? authorized? distributor? for? information. remarks: ? the ? notation? #xxx ?is?used? for? existing? products,?while?(new)? products?launched? since?15 th ?july?2001?and? rohs ? compliant?option?will?use? -xxxe. 300mil dip-8 300mil dip-8 400mil dip-8
3 package outline drawings hcpl-3120 outline drawing (standard dip package) hcpl-3120 gull wing surface mount option 300 outline drawing 1.080 0.320 (0.043 0.013) 2.54 0.25 (0.100 0.010) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. 5 typ. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002) 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010) 9.65 0.25 (0.380 0.010) 1.78 (0.070) max. 1.19 (0.047) max. a xxxxz yyw w date code dimensions in millimeters and (inches). 5 6 7 8 4 3 2 1 option code* type number * marking code letter for option numbers. "v" = option 060 option numbers 300 and 500 not marked. note: floating lead protrusion is 0.25 mm (10 mils) max. 3.56 0.13 (0.140 0.005) 0.635 0.25 (0.025 0.010) 12 nom. 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.65 0.25 (0.380 0.010) 6.350 0.25 (0.250 0.010) 1.016 (0.040) 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) land pattern recommendation 1.080 0.320 (0.043 0.013) 3.56 0.13 (0.140 0.005) 1.780 (0.070) max. 1.19 (0.047) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 0.254 + 0.076 - 0.051 (0.010 + 0.003) - 0.002)
4 1 . 0 8 0 0 . 3 2 0 ( 0 . 0 4 3 0 . 0 1 3 ) 2 . 5 4 0 . 2 5 ( 0 . 1 0 0 0 . 0 1 0 ) 0 . 5 1 ( 0 . 0 2 0 ) m i n . 0 . 6 5 ( 0 . 0 2 5 ) m a x . 4 . 7 0 ( 0 . 1 8 5 ) m a x . 2 . 9 2 ( 0 . 1 1 5 ) m i n . 5 t y p . 0 . 2 5 4 + 0 . 0 7 6 - 0 . 0 5 1 ( 0 . 0 1 0 + 0 . 0 0 3 ) - 0 . 0 0 2 ) 7 . 6 2 0 . 2 5 ( 0 . 3 0 0 0 . 0 1 0 ) 6 . 3 5 0 . 2 5 ( 0 . 2 5 0 0 . 0 1 0 ) 9 . 8 0 0 . 2 5 ( 0 . 3 8 6 0 . 0 1 0 ) 1 . 7 8 ( 0 . 0 7 0 ) m a x . 1 . 1 9 ( 0 . 0 4 7 ) m a x . a x x x x y y w w d a t e c o d e d i m e n s i o n s i n m i l l i m e t e r s a n d ( i n c h e s ) . 5 6 7 8 4 3 2 1 t y p e n u m b e r o p t i o n n u m b e r s 3 0 0 a n d 5 0 0 n o t m a r k e d . n o t e : f l o a t i n g l e a d p r o t r u s i o n i s 0 . 2 5 m m ( 1 0 m i l s ) m a x . 3 . 5 6 0 . 1 3 ( 0 . 1 4 0 0 . 0 0 5 ) 0 . 6 3 5 0 . 2 5 ( 0 . 0 2 5 0 . 0 1 0 ) 1 2 n o m . 9 . 6 5 0 . 2 5 ( 0 . 3 8 0 0 . 0 1 0 ) 0 . 6 3 5 0 . 1 3 0 ( 0 . 0 2 5 0 . 0 0 5 ) 7 . 6 2 0 . 2 5 ( 0 . 3 0 0 0 . 0 1 0 ) 5 6 7 8 4 3 2 1 9 . 8 0 0 . 2 5 ( 0 . 3 8 6 0 . 0 1 0 ) 6 . 3 5 0 0 . 2 5 ( 0 . 2 5 0 0 . 0 1 0 ) 1 . 0 1 6 ( 0 . 0 4 0 ) 1 . 2 7 ( 0 . 0 5 0 ) 1 0 . 9 ( 0 . 4 3 0 ) 2 . 0 ( 0 . 0 8 0 ) l a n d p a t t e r n r e c o m m e n d a t i o n 1 . 0 8 0 0 . 3 2 0 ( 0 . 0 4 3 0 . 0 1 3 ) 3 . 5 6 0 . 1 3 ( 0 . 1 4 0 0 . 0 0 5 ) 1 . 7 8 0 ( 0 . 0 7 0 ) m a x . 1 . 1 9 ( 0 . 0 4 7 ) m a x . 2 . 5 4 ( 0 . 1 0 0 ) b s c d i m e n s i o n s i n m i l l i m e t e r s ( i n c h e s ) . l e a d c o p l a n a r i t y = 0 . 1 0 m m ( 0 . 0 0 4 i n c h e s ) . n o t e : f l o a t i n g l e a d p r o t r u s i o n i s 0 . 5 m m ( 2 0 m i l s ) m a x . 0 . 2 5 4 + 0 . 0 7 6 - 0 . 0 5 1 ( 0 . 0 1 0 + 0 . 0 0 3 ) - 0 . 0 0 2 ) package outline drawings hcpl-j312 outline drawing (standard dip package) hcpl-j312 gull wing surface mount option 300 outline drawing
5 HCNW3120 outline drawing (8-pin wide body package) HCNW3120 gull wing surface mount option 300 outline drawing 5 6 7 8 4 3 2 1 11.15 0.15 (0.442 0.006) 1.78 0.15 (0.070 0.006) 5.10 (0.201) max. 1.55 (0.061) max. 2.54 (0.100) typ. dimensions in millimeters (inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 7 typ. 0.254 + 0.076 - 0.0051 (0.010 + 0.003) - 0.002) 11.00 (0.433) 9.00 0.15 (0.354 0.006) max. 10.16 (0.400) typ. a hcnwxxxx yyw w date code type number 0.51 (0.021) min. 0.40 (0.016) 0.56 (0.022) 3.10 (0.122) 3.90 (0.154) 1.00 0.15 (0.039 0.006) 7 nom. 12.30 0.30 (0.484 0.012) 0.75 0.25 (0.030 0.010) 11.00 (0.433) 5 6 7 8 4 3 2 1 11.15 0.15 (0.442 0.006) 9.00 0.15 (0.354 0.006) 1.3 (0.051) 13.56 (0.534) 2.29 (0.09) land pattern recommendation 1.78 0.15 (0.070 0.006) 4.00 (0.158) max. 1.55 (0.061) max. 2.54 (0.100) bsc dimensions in millimeters (inches). lead coplanarity = 0.10 mm (0.004 inches). note: floating lead protrusion is 0.25 mm (10 mils) max. 0.254 + 0.076 - 0.0051 (0.010 + 0.003) - 0.002) max.
6 recommended pb-free ir profle solder refow temperature profle 0 t i m e ( s e c o n d s ) t e m p e r a t u r e ( c ) 2 0 0 1 0 0 5 0 1 5 0 1 0 0 2 0 0 2 5 0 3 0 0 0 3 0 s e c . 5 0 s e c . 3 0 s e c . 1 6 0 c 1 4 0 c 1 5 0 c p e a k t e m p . 2 4 5 c p e a k t e m p . 2 4 0 c p e a k t e m p . 2 3 0 c s o l d e r i n g t i m e 2 0 0 c p r e h e a t i n g t i m e 1 5 0 c , 9 0 + 3 0 s e c . 2 . 5 c 0 . 5 c / s e c . 3 c + 1 c / ? 0 . 5 c t i g h t t y p i c a l l o o s e r o o m t e m p e r a t u r e p r e h e a t i n g r a t e 3 c + 1 c / ? 0 . 5 c / s e c . r e f l o w h e a t i n g r a t e 2 . 5 c 0 . 5 c / s e c . n o t e : n o n - h a l i d e f l u x s h o u l d b e u s e d . 2 1 7 c r a m p - d o w n 6 c / s e c . m a x . r a m p - u p 3 c / s e c . m a x . 1 5 0 - 2 0 0 c * 2 6 0 + 0 / - 5 c t 2 5 c t o p e a k 6 0 t o 1 5 0 s e c . 1 5 s e c . t i m e w i t h i n 5 c o f a c t u a l p e a k t e m p e r a t u r e t p t s p r e h e a t 6 0 t o 1 8 0 s e c . t l t l t s m a x t s m i n 2 5 t p t i m e t e m p e r a t u r e n o t e s : t h e t i m e f r o m 2 5 c t o p e a k t e m p e r a t u r e = 8 m i n u t e s m a x . t s m a x = 2 0 0 c , t s m i n = 1 5 0 c n o t e : n o n - h a l i d e f l u x s h o u l d b e u s e d . * r e c o m m e n d e d p e a k t e m p e r a t u r e f o r w i d e b o d y 4 0 0 m i l s p a c k a g e i s 2 4 5 c
7 regulatory information agency/standard hcpl-3120 hcpl-j312 HCNW3120 underwriters ? laboratory?(ul)? compliant ? compliant ? compliant ? recognized ?under?ul?1577,? component? recognition? program, ? category, ? file?e55361 canadian ? standards? association? (csa)? file? ca88324,? compliant ? compliant ? compliant ? per? component? acceptance? notice?#5 iec/en/din?en?60747-5-2? compliant ? compliant ? compliant ? ? option?060 insulation and safety related specifcations ? value hcpl- hcpl- hcnw parameter symbol 3120 j312 3120 units conditions ? minimum ? external? l(101)? 7.1? 7.4? 9.6? mm? measured ? from?input? terminals? to?output ? ? air ? gap? (clearance) ? ? ? ? ? ? terminals, ? shortest? distance? through? air. ? minimum ? external? l(102)? 7.4? 8.0? 10.0? mm? measured ? from?input? terminals? to?output? ? ? tracking ? (creepage) ? ? ? ? ? ? terminals, ? shortest? distance? path?along ? ?? ? ? ? ? ? body. ? minimum ? internal ? ? 0.08? 0.5? 1.0? mm? insulation ? thickness? between? emitter ? ? plastic ? gap? ? ? ? ? ? and? detector;?also? known?as? distance ? ? (internal ? clearance) ? ? ? ? ? ? through ? insulation. ? tracking ? resistance? cti ? >175? >175? >200? volts ? din?iec?112/vde?0303? part?1 ? ? (comparative ? ? tracking ? index) ? isolation ? group ? ? iiia? iiia? iiia ? ? material ? group?(din? vde?0110,?1/89, ? ?? ? ? ? ? ? table ?1)
8 iec/en/din en 60747-5-2 insulation related characteristics hcpl-3120 description symbol option 060 hcpl-j312 HCNW3120 unit installation ? classifcation?per?din? vde?0110/1.89, ? table ?1? ? ? ? ? ? ? ? ? for ? rated?mains? voltage?150? v? rms? ? i-iv? i-iv? i-iv ? ? ? for ? rated?mains? voltage?300? v? rms? ? i-iv? i-iv? i-iv ? ? ? for ? rated?mains? voltage?450? v? rms? ? i-iii? i-iii? i-iv ? ? ? for ? rated?mains? voltage?600? v? rms? ? ? i-iii? i-iv ? ? ? for ? rated?mains? voltage?1000? v? rms? ? ? ? i-iii climatic ? classifcation? ? 55/100/21? 55/100/21? 55/100/21 pollution ? degree?(din? vde?0110/1.89)? ? 2? 2? 2 maximum ? working ? insulation? voltage ? v iorm ? 630? 891? 1414? v peak input ? to? output? test ? voltage, ? method?b*? v pr ? 1181? 1670? 2652? v peak ? ? v iorm ?x?1.875?=? v pr ,?100%? production? test, ? ? t m ?=?1? sec,? partial? discharge? 9 recommended operating conditions parameter symbol min. max. units power ?supply? voltage ? ? (v cc ?-? v ee )? 15? 30? volts input ? current? (on)? hcpl-3120 ? ? 7 ? ? hcpl-j312 ? i f(on) ? ? 16? ma ? HCNW3120 ? ? 10 input ? voltage ? (off) ? ? v f(off) ? -3.6? 0.8? v operating ? temperature ? ? t a ? -40? 100? c absolute maximum ratings parameter symbol min. max. units note storage ? temperature ? ? t s ? -55? 125? c operating ? temperature ? ? t a ? -40? 100? c average ? input? current? ? i f(avg) ? ? 25? ma? 1 peak ? transient ? input? current ? ? i f(tran) ? ? 1.0? a ? (<1?s?pulse?width,?300?pps) reverse ? input? voltage ? hcpl-3120 ? v r ? ? 5? volts ? hcpl-j312 ? ? ? 5 ? ? HCNW3120 high ? peak? output? current? ? i oh(peak) ? ? 2.5? a? 2 low ? peak? output? current? ? i ol(peak) ? ? 2.5? a? 2 supply? voltage ? ? (v cc ?-? v ee )? 0? 35? volts input ? current? (rise/fall? time) ? ? t r(in)? /t f(in) ? ? 500? ns output ? voltage ? ? v o(peak) ? 0? v cc ? volts output ? power? dissipation? ? p o ? ? 250? mw? 3 total ? power? dissipation? ? p t ? ? 295? mw? 4 lead ? solder? temperature ? hcpl-3120 ? ? ? ? 260c? for?10? sec.,?1.6?mm? below? seating?plane ? ? hcpl-j312 ? HCNW3120 ? ? ? ? ? ? 260c ? for?10? sec.,?up? to? seating?plane solder ? refow? temperature ? profle ? ? ? ? ? ? ? ? ? see ? package? outline? drawings? section
10 electrical specifcations (dc) over ? recommended ? operating ? conditions ? (t a ? =? -40? to ? 100c,? for ? hcpl-3120, ? hcpl-j312 ? i f(on) ? =? 7? to ? 16ma,? for ? HCNW3120?i f(on) ?=?10? to?16ma,? v f(off) ?=?-3.6? to?0.8? v, ? v cc ?=?15? to?30? v, ? v ee ?=? ground)?unless? otherwise? specifed. parameter symbol device min. typ.* max. units test conditions fig. note high ? level? output? i oh? ? 0.5? 1.5 ? ? a? v o ?=? (v cc ?-?4? v) ? 2,?3,? 5 current ? ? ? 2.0 ? ? ? a? v o ?=? (v cc ?-?15? v) ? 17 ? 2 low ? level? output? i ol? ? 0.5? 2.0 ? ? a? v o ?=? (v ee ?+?2.5? v) ? 5,?6,? 5 current ? ? ? 2.0 ? ? ? a? v o ?=? (v ee ?+?15? v) ? 18 ? 2 high ? level? output? v oh ? ? (v cc ? -?4)? (v cc ? -?3) ? ? v? i o ?=?-100?ma? 1,?3,? 6,?7 ? voltage ? ? ? ? ? ? ? ? 19 low ? level? output? v ol? ? ? 0.1? 0.5? v? i o ?=?100?ma? 4,?6, ? voltage ? ? ? ? ? ? ? ? 20 high ? level?supply? i cch ? ? ? 2.5? 5.0? ma? output ?open,? 7,?8 ? current ? ? ? ? ? ? ? i f ?=?7? to?16?ma low ? level?supply? i ccl ? ? ? 2.5? 5.0? ma? output ?open, ? current ? ? ? ? ? ? ? v f ?=?-3.0? to?+0.8? v threshold ? input? i flh ? hcpl-3120 ? ? 2.3? 5.0? ma? i o ?=?0?ma,? 9,?15, current ? low? to ? ? hcpl-j312 ? ? 1.0 ? ? ? v o ?>?5? v? 21 high ? ? HCNW3120 ? ? 2.3? 8.0 threshold ? input? v fhl ? ? 0.8 ? ? ? v ? voltage ? high? to ? low input ? forward? v f ? hcpl-3120 ? 1.2? 1.5? 1.8? v? i f ?=?10?ma? 16 voltage ? ? hcpl-j312 ? ? 1.6? 1.95 ? ? ? HCNW3120 temperature ? ?v f /?t a ? hcpl-3120 ? ? -1.6 ? ? mv/c? i f ?=?10?ma coefcient ?of ? ? hcpl-j312 ? ? -1.3 ? forward ? voltage ? ? HCNW3120 input ? reverse? bv r ? hcpl-3120 ? 5 ? ? ? v? i r ?=?10?a breakdown ? ? hcpl-j312 ? 3 ? ? ? ? i r ?=?100?a ? voltage ? ? HCNW3120 input ? capacitance? c in ? hcpl-3120 ? ? 60 ? ? pf? f?=?1? mhz, ? ? hcpl-j312 ? ? 70 ? ? ? v f ?=?0? v ? ? ? HCNW3120 uvlo ? threshold ? v uvlo+ ? ? 11.0? 12.3? 13.5? v? v o ?>?5? v, ? 22, ? ? ? ? ? ? ? ? i f ?=?10?ma? 34 ? v uvloC ? ? 9.5? 10.7? 12.0 ? ? uvlo ? hysteresis? uvlo hys ? ? ? 1.6 *all ? typical? values? at? t a ?=?25c?and? v cc ?-? v ee ?=?30? v, ?unless? otherwise? noted.
11 switching specifcations (ac) over ? recommended ? operating ? conditions ? (t a ? =? -40? to ? 100c,? for ? hcpl-3120,hcpl-j312 ? i f(on) ? =? 7? to ? 16ma,? for ? HCNW3120?i f(on) ?=?10? to?16ma,? v f(off) ?=?-3.6? to?0.8? v, ? v cc ?=?15? to?30? v, ?? v ee ?=? ground)?unless? otherwise? specifed. parameter symbol min. typ.* max. units test conditions fig. note propagation ? delay? time ? t plh ? 0.10? 0.30? 0.50? s? rg?=?10? ,? 10,?11,? 16 ? to ? high? output? level ? ? ? ? ? ? cg?=?10? nf,? 12,?13, ? ? propagation ? delay? time ? t phl ? 0.10? 0.30? 0.50? s? f?=?10? khz,? 14,?23 ? to ? low? output? level ? ? ? ? ? ? duty ? cycle?=?50% pulse ? width ? distortion? pwd ? ? ? 0.3? s ? ? ? 17 propagation ? delay? pdd? -0.35 ? ? 0.35? s ? ? 35,?36? 12 ? diference ? between? any? (t phl ?-?t plh ) ? two ? parts rise ? time ? t r ? ? 0.1 ? ? s ? ? 23 fall ? time ? t f ? ? 0.1 ? ? s uvlo ? turn ?on? delay? t uvlo ?on ? ? 0.8 ? ? s? v o ?>?5? v, ?i f ?=?10?ma? 22 uvlo ? turn ? of? delay? t uvlo ?off ? ? 0.6 ? ? ? v o ? 12 package characteristics over ? recommended? temperature? (t a ?=?-40? to? 100c)?unless? otherwise? specifed. parameter symbol device min. typ. max. units test conditions fig. note input-output ? momentary? v iso ? hcpl-3120 ? 3750 ? ? ? v rms ? rh?HCNW3120? 5000 ? ? ? ? t a ?=?25c ? ? 10,?11 resistance ? r i-o ? hcpl-3120 ? ? 10 12 ? ? ? v i-o ?=?500? v dc ? ? 11 ? (input-output) ? ? hcpl-j312 ? ? HCNW3120? 10 12 ? 10 13 ? ? ? t a ?=?25c ? ? ? 10 11? ? ? ? t a ?=?100c capacitance ? c i-o ? hcpl-3120 ? ? 0.6 ? ? pf? f?=?1? mhz (input-output) ? ? hcpl-j312 ? ? 0.8 ? ? HCNW3120 ? ? 0.5? 0.6 led-to-case ? thermal ? q lc ? ? ? 467 ? ? c/w? thermocouple ? 28 ? resistance ? ? ? ? ? ? ? located ? at? center led-to-detector ? thermal ? q ld ? ? ? 442 ? ? c/w? underside?of ? resistance ? ? ? ? ? ? ? package detector-to-case ? q dc ? ? ? 126 ? ? c/w ? thermal ? resistance *all ? typicals? at? t a ?=?25c. **the ? input-output? momentary? withstand ? voltage ?is?a? dielectric? voltage? rating? that?should?not?be? interpreted?as?an? input-output? continuous? voltage ? rating.? for?the? continuous? voltage? rating? refer? to? your? equipment? level? safety? specifcation?or? avago? application? note?1074? entitled? op - tocoupler ? input-output? endurance? voltage. notes: ? 1. ? derate? linearly? above?70c? free-air? temperature? at?a? rate?of?0.3? ma/c. ? 2. ? maximum?pulse?width?=?10? s,?maximum? duty? cycle?=?0.2%.? this ? value?is? intended? to? allow? for? component? tolerances? for? designs?with?i o ?peak? minimum?=?2.0?a.? see? applications? section? for?additional?details?on?limiting?i oh ? peak. ? 3. ? derate? linearly? above?70c? free-air? temperature? at?a? rate?of?4.8?mw/c. ? 4. ? derate? linearly? above?70c? free-air? temperature? at?a? rate?of?5.4?mw/c.? the ?maximum?led? junction? tem-per a ture ?should?not? exceed?125c. ? 5. ? maximum?pulse?width?=?50? s,?maximum? duty? cycle?=?0.5%. ? 6. ? in?this? test? v oh ?is? measured?with?a?dc?load? current.? when ? driving? capacitive?loads? v oh ?will? approach? v cc ?as?i oh ? approaches? zero? amps. ? 7. ? maximum?pulse?width?=?1? ms,?maximum? duty? cycle?=?20%. ? 8. ? in? accordance?with? ul1577,?each? optocoupler?is? proof? tested? by?applying?an? insulation? test? voltage?4500? vrms ? for?1? second? (leakage? detec - tion? current? limit,?i i-o ??5? a).? ? 9. ? in? accordance?with?ul1577,?each? optocoupler?is? proof? tested? by?applying?an? insulation? test? voltage?4500? vrms ? for?1? second? (leakage? detec - tion? current? limit,?i i-o ??5? a). 10.? in? accordance?with?ul1577,?each? optocoupler?is? proof? tested? by?applying?an? insulation? test? voltage?6000? vrms ? for?1? second? (leakage? detec - tion? current? limit,?i i-o ??5? a). 11.? device? considered?a? two-terminal? device:?pins?1,?2,?3,?and?4? shorted? together?and?pins?5,?6,?7,?and?8? shorted? together. 12.? the ? diference? between?t phl ?and?t plh ? between? any? two? hcpl-3120? parts?under?the?same? test? condition. 13.? pins?1?and?4?need? to?be? connected? to?led? common. 14.? common?mode? transient? immunity?in?the?high? state?is?the?maximum? tolerable?dv cm /dt?of?the? common?mode? pulse,? v cm ,? to? assure? that?the? output?will? remain?in?the?high? state? (i.e.,? v o ? >? 15.0? v). 15.? common?mode? transient? immunity?in?a? low? state?is?the?maximum? tolerable?dv cm /dt?of?the? common?mode? pulse,? v cm ,? to? assure? that?the?out - put?will? remain?in?a? low? state? (i.e.,? v o ? 13 figure 7. i cc vs. temperature. figure 8. i cc vs. v cc . figure 4. v ol vs. temperature. figure 5. i ol vs. temperature. figure 6. v ol vs. i ol . figure 1. v oh vs. temperature. figure 2. i oh vs. temperature. figure 3. v oh vs. i oh . (v oh ? v cc ) ? high output voltage drop ? v -40 -4 t a ? temperature ? c 100 -1 -2 -20 hcpl-3120 fig 1 0 0 2 0 4 0 -3 60 80 i f = 7 to 16 ma i out = -100 ma v cc = 15 to 30 v v ee = 0 v i oh ? output high current ? a -40 1.0 t a ? temperature ? c 100 1.8 1.6 -20 hcpl-3120 fig 2 2.0 0 2 0 4 0 1.2 60 80 i f = 7 to 16 ma v out = (v cc - 4 v) v cc = 15 to 30 v v ee = 0 v 1.4 (v oh ? v cc ) ? output high voltage drop ? v 0 -6 i oh ? output high current ? a 2.5 -2 -3 0.5 hcpl-3120 fig 3 -1 1.0 1.5 -5 2.0 i f = 7 to 16 ma v cc = 15 to 30 v v ee = 0 v -4 100 c 25 c -40 c v ol ? output low voltage ? v -40 0 t a ? temperature ? c -20 hcpl-3120 fig 4-new 0.25 0 2 0 0.05 100 0.15 0.20 0.10 40 60 80 v f (off) = -3.0 to 0.8 v i out = 100 ma v cc = 15 to 30 v v ee = 0 v i ol ? output low current ? a -40 0 t a ? temperature ? c -20 hcpl-3120 fig 5-new 4 0 2 0 1 100 2 3 40 60 80 v f (off) = -3.0 to 0.8 v v out = 2.5 v v cc = 15 to 30 v v ee = 0 v v ol ? output low voltage ? v 0 0 i ol ? output low current ? a 2.5 3 0.5 hcpl-3120 fig 6 4 1.0 1.5 1 2.0 v f(off) = -3.0 to 0.8 v v cc = 15 to 30 v v ee = 0 v 2 100 c 25 c -40 c i cc ? supply current ? ma -40 1.5 t a ? temperature ? c 100 3.0 2.5 -20 hcpl-3120 fig 7 3.5 0 2 0 4 0 2.0 60 80 v cc = 30 v v ee = 0 v i f = 10 ma for i cch i f = 0 ma for i ccl i cch i ccl i cc ? supply current ? ma 15 1.5 v cc ? supply voltage ? v 30 3.0 2.5 hcpl-3120 fig 8 3.5 20 2.0 25 i f = 10 ma for i cch i f = 0 ma for i ccl t a = 25 c v ee = 0 v i cch i ccl
14 figure 9. i flh vs. temperature. figure 10. propagation delay vs. v cc . figure 11. propagation delay vs. i f . figure 12. propagation delay vs. temperature. figure 14. propagation delay vs. cg. figure 13. propagation delay vs. rg. i flh ? low to high current threshold ? ma -40 0 t a ? temperature ? c 100 3 2 -20 hcpl-3120 fig 9a 4 0 2 0 4 0 1 60 80 5 v cc = 15 to 30 v v ee = 0 v output = open hcpl-3120 i flh ? low to high current threshold ? ma -40 0 t a ? temperature ? c -20 hcpl-3120 fig 9b-new 5 0 2 0 1 100 2 3 40 60 80 v cc = 15 to 30 v v ee = 0 v output = open 4 hcpl-j312 i flh ? low to high current threshold ? ma -40 0 t a ? temperature ? c -20 hcpl-3120 fig 9c-new 5 0 2 0 1 100 2 3 40 60 80 v cc = 15 to 30 v v ee = 0 v output = open 4 HCNW3120 t p ? propagation delay ? ns 15 100 v cc ? supply voltage ? v 30 400 300 hcpl-3120 fig 10 500 20 200 25 i f = 10 ma t a = 25 c rg = 10 ? cg = 10 nf duty cycle = 50% f = 10 khz t pl h t phl t p ? propagation delay ? ns 6 100 i f ? forward led current ? ma 16 400 300 hcpl-3120 fig 11 500 10 200 12 v cc = 30 v, v ee = 0 v rg = 10 ? , cg = 10 nf t a = 25 c duty cycle = 50% f = 10 khz t plh t ph l 14 8 t p ? propagation delay ? ns -40 100 t a ? temperature ? c 100 400 300 -20 hcpl-3120 fig 12 500 0 2 0 4 0 200 60 80 t pl h t phl i f = 10 ma v cc = 30 v, v ee = 0 v rg = 10 ? , cg = 10 nf duty cycle = 50% f = 10 khz t p ? propagation delay ? ns 0 100 rg ? series load resistance ? ? 50 400 300 10 hcpl-3120 fig 13 500 30 200 40 t plh t ph l v cc = 30 v, v ee = 0 v t a = 25 c i f = 10 ma cg = 10 nf duty cycle = 50% f = 10 khz 20 t p ? propagation delay ? ns 0 100 cg ? load capacitance ? nf 100 400 300 20 hcpl-3120 fig 14 500 40 200 60 80 t plh t ph l v cc = 30 v, v ee = 0 v t a = 25 c i f = 10 ma rg = 10 ? duty cycle = 50% f = 10 khz
15 figure 15. transfer characteristics. figure 16. input current vs. forward voltage. figure 17. i oh test circuit. v o ? output voltage ? v 0 0 i f ? forward led current ? ma 5 25 15 1 hcpl-3120 fig 15 30 2 5 3 4 20 10 v o ? output voltage ? v 0 0 i f ? forward led current ? ma 1 hcpl-3120 fig 15b 35 2 5 5 15 25 3 4 10 20 hcpl-j312 30 i f ? forward current ? ma 1.10 0.001 v f ? forward voltage ? volts 1.60 10 1.0 0.1 1.20 hcpl-3120 fig 16a 1000 1.30 1.40 1.50 t a = 25c i f v f + ? 0.01 100 hcpl-3120 v f ? forward voltage ? volts 1.2 1.3 1.4 1.5 i f ? forward current ? ma 1.7 1.6 1.0 i f + t a = 25c ? hcpl-j312/HCNW3120 v f 0.1 0.01 0.001 10 100 1000 hcpl-3120 fig 16b hcpl-3120 fig 17 0.1 f v cc = 15 to 30 v 1 3 i f = 7 to 16 ma + ? 2 4 8 6 7 5 + ? 4 v i oh
16 figure 20. v ol test circuit. figure 21. i flh test circuit. figure 19. v oh test circuit. figure 18. i ol test circuit. figure 22. uvlo test circuit. hcpl-3120 fig 18 0.1 f v cc = 15 to 30 v 1 3 + ? 2 4 8 6 7 5 2.5 v i ol + ? hcpl-3120 fig 19 0.1 f v cc = 15 to 30 v 1 3 i f = 7 to 16 ma + ? 2 4 8 6 7 5 100 ma v oh hcpl-3120 fig 20 0.1 f v cc = 15 to 30 v 1 3 + ? 2 4 8 6 7 5 100 ma v ol hcpl-3120 fig 21 0.1 f v cc = 15 to 30 v 1 3 i f + ? 2 4 8 6 7 5 v o > 5 v hcpl-3120 fig 22 0.1 f v cc 1 3 i f = 10 ma + ? 2 4 8 6 7 5 v o > 5 v
17 figure 24. cmr test circuit and waveforms. figure 23. t plh , t phl , t r , and t f test circuit and waveforms. hcpl-3120 fi g 23 0.1 f v cc = 15 to 30 v 10 ? 1 3 i f = 7 to 16 ma v o + ? + ? 2 4 8 6 7 5 10 kh z 50% dut y cycle 500 ? 10 nf i f v out t phl t plh t f t r 10% 50% 90% hcpl-3120 fi g 24 0.1 f v cc = 30 v 1 3 i f v o + ? + ? 2 4 8 6 7 5 a + ? b v cm = 1500 v 5 v v cm ? t 0 v v o switch at b: i f = 0 ma v o switch at a: i f = 10 ma v ol v oh ? t v cm v t =
18 applications information eliminating ? negative ? igbt ? gate ? drive ? (discussion? applies? to ? hcpl-3120,? hcpl-j312,?and?HCNW3120) to ? keep? the? igbt ? frmly ? of, ? the? hcpl-3120 ? has? a? very ? low ? maximum? v ol ? specifcation ? of? 0.5? v. ? the ? hcpl-3120 ? realizes ? this? very ? low ? v ol ? by ? using? a? dmos? transistor ? with? 1? ?? (typical) ? on? resistance ? in? its? pull? down ? circuit. ? when ? the? hcpl-3120 ? is? in? the? low ? state, ? the? igbt ? gate ? is? shorted ? to ? the? emitter ? by ? rg? +? 1? ?.? minimizing ? rg? and? the? lead? inductance ? from ? the? hcpl-3120 ? to ? the? igbt ? gate ? and? emitter ? (possibly? by ? mounting ? the? hcpl- figure 25. recommended led drive and application circuit. + hvdc 3-phase ac - hvdc hcpl-3120 fig 25 0.1 f v cc = 18 v 1 3 + ? 2 4 8 6 7 5 270 ? hcpl-3120 +5 v control input rg q1 q2 74xxx open collector 3120? on? a? small? pc? board ? directly ? above ? the? igbt) ? can? eliminate ? the? need? for ? negative ? igbt ? gate ? drive ? in? many ? applica tions? as? shown ? in? figure ? 25.? care ? should? be? taken? with? such? a? pc? board ? design ? to ? avoid ? routing ? the? igbt ? collector ? or? emitter ? traces ? close? to ? the? hcpl-3120 ? input? as? this? can? result ? in? unwanted ? coupling ? of? transient ? signals ? into ? the? hcpl-3120 ? and? degrade ? performance. ? (if ? the? igbt ? drain ? must? be? routed ? near? the? hcpl-3120 ? input, ? then? the? led? should? be? reverse-biased ? when? in? the? of ? state, ? to ? prevent ? the? transient ? signals ? coupled ? from ? the? igbt ? drain? from? turning?on?the?hcpl -3120.)?
19 selecting ? the? gate ? resistor ? (rg)? to ? minimize ? igbt ? switching ? losses. ? (discussion? applies? to ? hcpl-3120, ? hcpl-j312 ?and?HCNW3120) step ? 1:? calculate ? rg? minimum ? from ? the? i ol ? peak ? specifca- tion.? the ? igbt ? and? rg? in? figure ? 26? can? be? analyzed ? as? a? simple? rc ? circuit ? with? a? voltage ? supplied? by ? the? hcpl- 3120. ? ? (v cc ?C? v ee ?-? v ol ) ? rg? ? ?? ? ? ? ? ? ? ? i olpeak ? ? ? ? (v cc ?C? v ee ?-?2? v) ? ? =? ?? ? ? ? ? ? ? ????? i olpeak ? ? ? ? ? (15? v?+?5? v?-?2? v) ? ? =? ?? ? ? ? ? ? ??? ? ??? 2.5?a ? ? ? ? =? 7.2??? @ ?8?? ? the ? v ol ? value?of?2? v?in?the?pr evious? equation?is?a? con - servative ? value?of? v ol ? at?the?peak? current?of?2.5a?(see? figure ?6).? at? lower?rg? values?the? voltage?supplied? by? the? hcpl-3120?is?not?an?ideal? voltage? step.? this ? results? in? lower?peak? currents? (more? margin)?than? predicted? by? this? analysis.? when ? negative? gate? drive?is?not?used? v ee ?in? the? previous? equation?is?equal? to? zero? volts. step ?2:?check?the? hcpl-3120? power? dissipation?and? increase ?rg?if? necessary.? the ? hcpl-3120? total? power? dissipa tion?(p t )?is?equal? to?the?sum?of?the? emitter? power? (p e )?and?the?output? power?(p o ): p t ? =?p e ?+?p o pe? =?i f? ? ? v f? ? duty? cycle p o ? =?p o(bias) ?+?p o? (switching) ? ? =?i cc ? ? ? (v cc ?-? v ee )+?e sw (r g ,?q g )? ? ?f figure 26. hcpl-3120 typical application circuit with negative igbt gate drive. + hvdc 3-phase ac - hvdc hcpl-3120 fig 26 0.1 f v cc = 15 v 1 3 + ? 2 4 8 6 7 5 hcpl-3120 rg q1 q2 v ee = -5 v ? + 270 ? +5 v control input 74xxx open collector for ? the? circuit ? in? figure ? 26? with? i f ? (worst ? case)? =? 16? ma,? rg? =? 8? ?,? max ? duty ? cycle ? =? 80%,? qg ? =? 500? nc,? ? f? =? 20? khz?and? t a ?max?=?85?c: p e ? =?16?ma ? ? 1.8? v? ? 0.8?=?23?mw p o ? =?4.25?ma ? ? 20? v?+?5.2?? j? ? 20? khz ? ? =?85?mw?+?104?mw ? ? =?189?mw?>?178?mw?(p o(max) ?@?85 c ? ? =?250?mw - 15c*4.8? mw/c) the ? value ? of? 4.25? ma? for ? i cc ? in? the? previous ? equation ? was ? obtained? by ? derating ? the? i cc ? max? of? 5? ma? (which? occurs ? at ? -40c)? to?i cc ?max? at?85c?(see? figure?7). since ? p o ? for ? this? case? is? greater ? than? p o(max) ,? rg? must? be? increased ? to? reduce?the? hcpl-3120? power? dissipation. p o(switching ? max) ? ? ? =?p o(max) ?-?p o(bias) ? ? =?178?mw?-?85?mw ? =?93?mw ? ? ? ? ? p o(switchingmax) ? e sw(max) ? =? ? ? ? ? ? ? ? ? f ? ? ? ? ? ? 93?mw ? ? ? = ??? =?4.65?w ? ? ? ? ? 20? khz for ? qg ? =? 500? nc,? from ? figure ? 27, ? a? value ? of? e sw ? =? 4.65? w? gives ?a???rg?=?10.3??.
20 p o parameter description i cc ? supply? current v cc ? positive ?supply? voltage v ee ? negative ?supply? voltage e sw (rg,qg) ? energy ? dissipated?in?the? hcpl-3120 ? ? for ?each? igbt? switching? cycle ?? ? ? (see ? figure?27) f? switching ? frequency figure 27. energy dissipated in the hcpl-3120 for each igbt switching cycle. esw ? energy per switching cycle ? j 0 0 rg ? gate resistance ? ? 50 6 10 hcpl-3120 fig 27 14 20 4 30 40 12 qg = 100 nc qg = 500 nc qg = 1000 nc 10 8 2 v cc = 19 v v ee = -9 v thermal model (discussion applies to hcpl-3120, hcpl- j312 and HCNW3120) the ? steady ? state ? thermal ? model? for ? the? hcpl-3120 ? is? shown ? in? figure ? 28.? the ? thermal ? resistance ? values ? given ? in? this? model? can? be? used? to ? calculate ? the? temper a tures ? at ? each? node? for ? a? given ? operating ? condition. ? as ? shown ? by ? the? model, ? all? heat ? generated ? fows ? through ? q ca ? which? raises ? the? case? temperature ? t c ? accordingly. ? the ? value ? of? q ca ? depends? on? the? conditions ? of? the? board ? design ? and? is, ? therefore, ? determined ? by ? the? designer. ? the ? value ? of? q ca ? =? 83c/w? was ? obtained? from ? thermal ? measure - ments ? using? a? 2.5? x? 2.5? inch? pc? board, ? with? small? traces ? (no? ground ? plane),? a? single? hcpl-3120 ? soldered ? into ? the? center ? of? the? board ? and? still? air. ? the ? absolute ? maximum? power ? dissipation ? derating ? specifca tions? assume? a? q ca value ?of? 83c/w. from ? the? thermal ? mode? in? figure ? 28? the? led? and? detector ? ic? junction? temperatures?can?be? expressed?as: t je ?=?p e ? @ ? ( q lc ||( q ld ?+? q dc )?+? q ca ) ? ? ? ? ?? q lc ?*? q dc +?p d ? ( ??+? q ca )?+? t a ? ? ??? q lc ?+? q dc ?+? q ld ? ? ? ? ? q lc ? ? ? q dc t jd ?= ? p e ?(??+? q ca ) ? ? ? ?? ? q lc ?+? q dc ? +? q ld +?p d? ? ( q dc ||( q ld ?+? q lc )?+? q ca )?+? t a inserting ? the? values ? for ? q lc ? and? q dc ? shown ? in? figure ? 28? gives: t je ?=?p e? ? (256c/w?+? q ca ) ? ? ?? +?p d? ? (57c/w?+? q ca ) ?+?t a ? t jd ?=?p e? ? (57c/w?+? q ca ) ? ? ?? +?p d? ? (111c/w?+? q ca ) ?+?t a for ? example, ? given ? p e ? =? 45? mw, ? p o ? =? 250? mw, ? t a ? =? 70c? and? q ca ? =? 83c/w: t je ?=?p e? ? 339c/w?+?p d? ? 140c/w?+?t a ? ? ?? =?45?mw? ? 339c/w?+?250?m w ? ? ? ? ? ? 140c/w?+?70c?=?120c t jd ?=?p e? ? 140c/w?+?p d? ? 194c/w?+?t a ? ? ?? = ? 45 ? mw ? ? 140c/w ? + ? 250 ? m w ? ? 194c/w ? + ? 70c ? = ? 125c t je ? and? t jd ? should? be? limited ? to ? 125c ? based? on? the? board ? layout ? and? part ? placement ? ( q ca )? specifc? to ? the? ap - plication. p e parameter description i f ? led? current v f ? led?on? voltage duty ? cycle? maximum ?led? duty? cycle
21 ? t je ? =? led? junction? temperature ? ? t jd ? =? detector ?ic? junction? temperature ? ? t c ? =? case? temperature? measured? at?the? center?of?the? package? bottom ? ? q lc ? =? led-to-case ? thermal? resistance ? ? q ld ? =? led-to-detector ? thermal? resistance ? ? q dc ? =? detector-to-case ? thermal? resistance ? ? q ca ? =? case-to-ambient ? thermal? resistance ? ???* q ca ?will?depend?on?the? board? design?and?the? placement?of?the? part. figure 28. thermal model. hcpl-3120 fig 28 ld = 442 c/w t je t jd lc = 467 c/w dc = 126 c/w ca = 83 c/w * t c t a t je = led junction temperature t jd = detector ic junction temperature t c = case temperature measured at the center of the package bottom lc = led-to-case thermal resistance ld = led-to-detector thermal resistance dc = detector-to-case thermal resistance ca = case-to-ambient thermal resistance * ca will depend on the board design and the placement of the part. led drive circuit considerations for ultra high cmr per - formance. (discussion applies to hcpl-3120, hcpl-j312, and HCNW3120) without ? a? detector ? shield, ? the? dominant ? cause? of? op - tocoupler ? cmr? failure ? is? capacitive ? coupling ? from ? the? input? side? of? the? optocoupler, ? through ? the? package, ? to ? the? detector ? ic? as? shown ? in? figure ? 29.? the ????? hcpl-3120 ? improves ? cmr? perform-ance ? by ? using? a? detector ? ic? with? an? optically? transparent ? faraday ? shield, ? which? diverts ? the? capaci tively? coupled ? current ? away ? from ? the? sensitive ? ic? circuitry. ? ho w ever, ? this? shield? does? not? eliminate ? the? ca - pacitive ? coupling ? between ? the? led? and? optocou pler? pins? 5-8? as? shown ? in? figure ? 30.? this ? capacitive ? coupling ? causes? figure 29. optocoupler input to output capacitance model for unshielded optocouplers. figure 30. optocoupler input to output capacitance model for shielded optocouplers. hcpl-3120 fig 29 1 3 2 4 8 6 7 5 c ledp c ledn hcpl-3120 fig 30 1 3 2 4 8 6 7 5 c ledp c ledn shield c ledo1 c ledo2 perturbations ? in? the? led? current ? during ? common ? mode? transients ? and? becomes ? the? major? source ? of? cmr? failures ? for ? a? shielded? optocoupler. ? the ? main? design ? objective ? of? a? high? cmr? led? drive ? circuit ? becomes ? keeping? the? led? in? the? proper ? state ? (on? or? of ) ? during ? common ? mode? transients. ? for ? example, ? the? recommended ? application ? circuit ? (figure ? 25),? can? achieve ? 25? kv/s? cmr? while? mini - mizing? component? complexity. techniques ? to ? keep? the? led? in? the? proper ? state ? are ? discussed?in?the? next? two? sections.
22 cmr with the led on (cmr h ). a? high? cmr? led? drive ? circuit ? must? keep? the? led? on? during ? common ? mode? transients. ? this ? is? achieved ? by ? overdriv - ing? the? led? current ? beyond ? the? input? threshold ? so? that ? it? is? not? pulled? below ? the? threshold ? during ? a? transient. ? a? minimum? led? cur rent ? of? 10? ma? provides ? adequate ? margin ? over ? the? maximum? i flh ? of? 5? ma? to ? achieve ? 25? kv/ s?cmr. cmr with the led of (cmr l ). a? high? cmr? led? drive ? circuit ? must? keep? the? led? of ? (v f ? ? v f(off) )? during ? common ? mode? transients. ? for ? example, ? during ? a? -dv cm /dt? transient ? in? figure ? 31,? the? current ? fowing ? through ? c ledp ? also? fows ? through ? the? hcpl-3120 fig 31 rg 1 3 v sat 2 4 8 6 7 5 + v cm i ledp c ledp c ledn shield * the arrows indicate the directio n of current flow during ?d v cm /dt. +5 v + ? v cc = 18 v ? ? ? ? ? ? 0.1 f + ? ? figure 33. recommended led drive circuit for ultra-high cmr. hcpl-3120 fig 33 1 3 2 4 8 6 7 5 c ledp c ledn shield +5 v figure 31. equivalent circuit for fgure 25 during common mode transient. figure 32. not recommended open collector drive circuit. hcpl-3120 fig 32 1 3 2 4 8 6 7 5 c ledp c ledn shield +5 v q1 i ledn r sat ? and? v sat ? of? the? logic ? gate. ? as ? long? as? the? low ? state ? voltage ? developed ? across ? the? logic ? gate ? is? less? than? v f(off) ,? the? led? will? remain ? of? and? no? common ? mode? failure ?will? occur. the ? open? collector ? drive ? circuit, ? shown ? in? figure ? 32,? cannot? keep? the? led? of? during ? a? +dvcm/dt ? transient, ? since ? all? the? current ? fowing ? through ? c ledn ? must? be? supplied? by ? the? led, ? and? it? is? not? recommended ? for ? applica-tions? requiring ? ultra ? high? cmr l ? performance. ? figure ? 33? is? an? alternative ? drive ? circuit ? which,? like? the? rec - ommended? applica-tion? circuit ? (figure ? 25),? does? achieve ? ultra ? high? cmr? performance ? by ? shunting ? the? led? in? the? of? state. figure 34. under voltage lock out. v o ? output voltage ? v 0 0 (v cc - v ee ) ? supply voltage ? v 10 5 hcpl-3120 fig 34 14 10 15 2 20 6 8 4 12 (12.3, 10.8) (10.7, 9.2) (10.7, 0.1) (12.3, 0.1)
23 under voltage lockout feature. (discussion applies to hcpl-3120, hcpl-j312, and HCNW3120) the ? hcpl-3120 ? contains ? an? under? voltage ? lockout? (uvlo) ? feature ? that ? is? designed ? to ? protect ? the? igbt ? under? fault? conditions ? which? cause? the? hcpl-3120 ? supply? voltage ? (equivalent ? to ? the? fully-charged ? igbt ? gate ? voltage) ? to ? drop ? below ? a? level ? necessary ? to ? keep? the? igbt ? in? a? low ? re - sistance ? state. ? when ? the? hcpl-3120 ? output? is? in? the? high? state ? and? the? supply? voltage ? drops ? below ? the ????? hcpl- 3120? v uvloC ? threshold ? (9.5? HCNW3120) the ? hcpl-3120 ? includes? a? propagation ? delay ? diference ? (pdd) ? specifcation ? intended ? to ? help? designers ? minimize ? dead ? time ? in? their? power ? inverter ? designs. ? dead ? time? is? the? time? period ? during ? which? both? the? high? and? low ? side? power ? transistors ? (q1 ? and? q2? in? figure ? 25)? are ? of. ? any ? overlap ? in? q1? and? q2? conduction ? will? result ? in? large ? currents ? fowing ? through ? the? power ? devices ? between ? the?high?and? low? voltage? motor? rails. figure 35. minimum led skew for zero dead time. figure 36. waveforms for dead time. t phl max t plh mi n pdd* max = (t phl - t plh ) max = t phl max - t plh mi n *pdd = propagation delay difference note: for pdd calculations the propagation delays are taken at the same temperature and test conditions. v out 1 i led2 v out 2 i led1 q1 on q2 off q1 off q2 on hcpl-3120 fig 35 t pl h mi n maximum dead time (due to optocoupler) = (t phl max - t phl mi n ) + (t plh max - t plh mi n ) = (t phl max - t plh mi n ) ? (t phl min - t plh max ) = pdd* max ? pdd* min *pdd = propagation delay difference note: for dead time and pdd calculations all propagation delays are taken at the same temperature and test conditions. v out 1 i led2 v out 2 i led1 q1 on q2 off q1 off q2 on hcpl-3120 fig 36 t phl mi n t phl max t plh max pdd* ma x (t phl - t pl h ) max
figure 37. thermal derating curve, dependence of safety limiting value with case temperature per iec/en/din en 60747-5-2. output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 175 hcpl-3120 fig 37b 1000 50 400 125 25 75 100 150 600 800 200 100 300 500 700 900 HCNW3120 p s (mw) i s (ma) output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 200 600 400 25 hcpl-3120 fig 37a 800 50 75 100 200 150 175 p s (mw) 125 100 300 500 700 i s (ma) for hcpl-3120 option 060 i s (ma) for hcpl-j312 hcpl-3120 option 060hcpl-j312 to ? minimize ? dead? time? in? a? given ? design, ? the? turn ? on? of? led2? should? be? delayed ? (relative ? to ? the? turn ? of? of? led1)? so? that ? under? worst-case ? con-ditions, ? transistor ? q1? has? just? turned ? of? when? transistor ? q2? turns ? on,? as? shown ? in? figure ? 35.? the ? amount ? of? delay ? necessary ? to ? achieve ? this? cond itions? is? equal? to ? the? maximum? value ? of? the? propa - gation ? delay ? diference ? specifcation, ? pdd max ,? which? is? specifed? to ? be? 350? ns? over ? the? operating ? temperature ? range ?of?-40c? to?100c. delaying ? the? led? signal ? by ? the? maximum? propagation ? delay ? diference ? ensures ? that ? the? minimum? dead? time? is? zero, ? but? it? does? not? tell ? a? designer ? what ? the? maximum? dead? time? will? be. ? the ? maximum? dead? time? is? equivalent ? to ? the? diference ? between ? the? maximum? and? minimum? prop aga tion? delay ? diference ? specifca tions? as? shown ? in? figure ? 36.? the ? maximum? dead? time? for ? the? hcpl-3120 ? is? 700? ns? (=? 350? ns? -? (-350? ns))? over ? an? operating ? tempera - ture ? range?of?-40c? to?100c. note ? that ? the? propagation ? delays ? used? to ? calculate ? pdd? and? dead? time? are ? taken? at ? equal? temper a tures ? and? test ? conditions ? since ? the? optocouplers ? under? conside r ation ? are ? typically ? mounted ? in? close? proximity ? to ? each? other? and? are? switching? identical? igbts. for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies. all rights reserved. obsoletes av01-0622en av02-0161en - july 4, 2008

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